Senior Staff Engineer, Design Verification

Marvell Semiconductor, Inc.
United States, California, Santa Clara
5488 Marvell Lane (Show on map)
May 16, 2025
About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Infrastructure Processor Business Unit, a part of Networking and Processor Business Group, encompasses OCTEON and the award-winning OCTEON Fusion-M product families. The SoC family of multi-core CPU processors and Radio Access SoCs offer best-in-class performance, low power, rich software ecosystem, virtualization features, and open source application support with highly optimized custom ARM CPU cores providing an excellent solution for a highly flexible end-to-end optimized 5G platform. As part of the Infrastructure Processor unit at Marvell, you will verify all of the circuitry that goes inside our chips for the general market and for specific customers. These chips use cutting-edge technology to facilitate data transfers at high speeds, and you will help verify that each design meets our customers' specifications whether they're a major telecom organization or automotive company, etc. What You Can Expect Develop comprehensive test plan and architect verification infrastructure for System-on-chip (SoC). Build Block & sub-system level SV/UVM test bench development from scratch. Write constraint random test cases and directed test cases to achieve functional and code coverage goals. Debug failures and work with designers & software team to resolve issues. Develop functional verification of design on block, sub-system and SoC level. Develop testcases and rate monitors to measure latency and performance. Develop test automation framework using Python/Perl. Wage $179,000.00 - $199,000.00 per year. Telecommuting is permitted. What We're Looking For Master's or foreign equivalent degree in Electrical/Electronic Engineering, Computer Science/Engineering, or a related field and three (3) years of experience in the job offered or related occupation. Experience must include three (3) years with each of the following: * Developing complex random verification environment using System Verilog/UVM. * Writing complex System Verilog Assertions & constraints. * Writing & Analyzing Functional coverage and closure. * Writing test plan and testcases using System Verilog/UVM. * Debugging and performing verification closure of block or sub-system. * Developing verification collaterals using programming language C/C++. * Scripting/Automation using Python or Perl. Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We're dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it's like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-TT1