New 
Senior Staff Design Verification Engineer
 Aleron | |
 United States, Texas, Austin | |
 Jun 05, 2025 | |
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Description Responsible for verifying digital and mixed-signal designs, including systems-on-chip with multiple CPUs, digital signal processors, security hardware, and other logic for IoT applications. Assumes full ownership of DV tasks and delivers high-quality results.
-Develop test plans at block, sub-system, and chip level. Execute SoC-based verification at full chip.
-Write C-based lib packages and tests. Architect and implement scalable and reusable test benches using SystemVerilog and UVM.
-Develop comprehensive test cases, stimulus generation, and checkers to achieve high coverage.
-Automating the test environment for randomized testing and scoreboarding. Utilize advanced debugging techniques to identify and resolve design and verification issues.
-Perform root-cause analysis and work with design teams to fix identified issues. Define and track functional and code coverage metrics to ensure thorough verification.
-Ensure that verification quality meets or exceeds industry standards and project requirements. Job Requirements Required Skills / Qualifications:
Bachelor Degree in Electrical Engineering
Minimum 8 years design verification experience in SoC development environment to include C-based and SystemVerilog/UVM verification
Preferred Skills / Qualifications:
Aleron companies (Acara Solutions, Aleron Shared Resources, Broadleaf Results, Lume Strategies, TalentRise, Viaduct) are an Equal Opportunity Employer. Race/Color/Gender/Religion/National Origin/Disability/Veteran.
Applicants for this position must be legally authorized to work in the United States. This position does not meet the employment requirements for individuals with F-1 OPT STEM work authorization status. Apply | |