FPGA/ASIC Design Engineer

Are you an FPGA/ASIC Design Engineer looking to join one of the top companies in the Aerospace and Defense industry?

Are you looking to further your career and grow?

Do you have VHDL Experience?

If you answered yes to those three questions, then apply today!

Acara Solutions seeks highly qualified candidates to work onsite with our client in Reston, VA. Interested?

Here's what you'd do:

• Reporting to the Manager, Engineering (ASIC/FPGA), the Design Engineer will be part of the key ASIC/FPGA design team, responsible for delivering FPGA/ASICs for high-speed crypto applications.
• You will architect and implement high-speed crypto architectures on ASICs/Xilinx Zynq/MPSOC class FPGAs, with hands-on design/debug with Ethernet, TCP/IP protocols.
• This is a key, high-impact role in the organization to ensure robust quality and delivery of communication products for National Security.
• Derive engineering specifications from system requirements and develop detailed architecture.
• Execute design (RTL OR HLS (C++ to RTL)) and RTL quality (RDC, CDC, Formal, Lint)
• Generate test plans.
• Perform module-level verification, synthesis/STA, Lab debug, and SW-driven validation on Linux-based SOC evaluation boards.
• Silicon/FPGA bring up, characterization, and production ramp/support/collateral.

Here's what you'll get:

Pay: $90.00-$125.00/hr.

Hours: 9/80 - 1^st Shift.

Length: Temp to Direct (6 months).

Sounds like a good fit?

APPLY TODAY

About Acara Solutions

Acara is a premier recruiting and workforce solutions provider-we help companies compete for talent. With a legacy of experience in various industries worldwide, we partner with clients, listen to their needs, and customize visionary talent solutions that drive desired business outcomes. We leverage decades of experience to deliver contingent staffing, direct placement, executive search, and workforce services worldwide.

• Bachelor's Degree in Electrical Engineering with at least 4 years of experience.
• Minimum 5 years of VHDL Experience.
• Minimum 4 years of experience developing, implementing, and verifying high-performance communications/networking ASIC/FPGA products.
• Minimum 4 years of experience mapping algorithms and standards (Ethernet, TCP/IP, AXI) to hardware and architecture/system design tradeoffs.

• Master's Degree with at least 2 years of experience.
• Experience in Aerospace / Defense.
• Experience in Xilinx MPSOC design with writing/debugging with SDKs, BSPs on bare metal/Peta, Linux OS.
• Experience with high-level synthesis (Xilinx Vivado HLS, OR Mentor Calypto).
• Experience with Universal Verification Mythology (UVM).
• Experience with project leadership and EVM.
• Embedded SW C++ (OOP) and System Verilog Assertions (SVA).
• Knowledge of high-speed protocols (PCIe, TCP/IP, Ethernet).
• FPGA design EDA.
• Must have done hands-on multiple complex designs, arch/design/verification/Synthesis/STA.
• Working with the Ethernet protocol (not just instantiating the IP).
• Mentor EDA CDC/Lint/AC/RDC.
• Proficient in VHDL design process and FPGA flow.
• Knowledge of Ethernet, TCP/IP protocols.
• Good logic/board debug and analytical skills.
• Excellent written, verbal, and presentation skills.

Additional Information:

• Upon offer of employment, the individual will be subject to a background check and a drug screen.
• In compliance with federal law, all persons hired will be needed to verify identity and eligibility to work in the United States and to complete the necessary employment eligibility verification form upon hire.
• Under the International Traffic in Arms Regulations (ITAR), all employees assigned to this client must provide documentation verifying their status as a 'U.S. Person,' as defined in ITAR clause 120.15. A U.S. Person is a protected individual under the anti-discrimination provisions of U.S. immigration laws.
• Active Secret Clearance.