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Principal Analog Mixed-Signal Design Engineer - RF/SiPho/TIA/CMOS/SiGe

Marvell Semiconductor, Inc.
paid time off, flex time, 401(k)
United States, California, Westlake Village
Sep 11, 2025

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Marvell's Broadband Analog group designs physical layer ICs for high-speed fiber optic data communication, such as Transimpedance Amplifiers (TIAs), and drivers for Silicon Photonic (SiPho) and discrete Electro-absorption Modulators (EAMs) and Mach-Zehnder Interferometer Modulators (MZMs). This group is the market leader in delivering TIAs and Drivers for Data Center and Telecom markets. We address the bandwidth, capacity and power issues faced by cloud computing and mega data center networks. Our world class group leverages our core competencies in advanced circuit design to solve the world's ever-increasing desire to transmit more data for less power with fewer errors. We are continually first to market in Data Center, Metro and Long-Haul applications.
As a member of the design group, the candidate will be responsible for design and validation of FET and BiCMOS circuits for high-speed broadband ICs that serve these applications.

What You Can Expect

Marvell is seeking an RF and Analog Design Engineer to contribute to the development of multi-tens of GHz Transimpedance amplifiers TIAs. These optical interface chips are tightly coupled with our high-performance equalizers. The results of our innovative designs have made our TIAs best in class for coherent long-haul and metro systems as well as PAM4 data center systems.

In this role you will be responsible for:

  • Active circuit design as well as technical leadership.
  • Design leading edge transimpedance amplifier design, primarily in Silicon Germanium (SiGe) BiCMOS (Bipolar Complementary Metal Oxide Semiconductor) technology, where circuit performance will need to transcend beyond industry leading products.
  • Develop transmission line structures and other millimeter wave structures to enable higher performance than would normally be achievable.
  • Design of hi-performance broadband analog circuits for optical front-end receivers.
  • Design of various other analog circuitsincluding linear regulators, AGC loop, current/voltage sensors, bandgaps etc.
  • Develop microarchitecture of major circuit blocks and guide team of designers to implement them. Work with various technologies including SiGe BiCMOS and CMOS.
  • Work with other functional groups to facilitate post-silicon validation, qualification, transition to mass production, and customer support.

What We're Looking For

Bachelor's degree in Electrical Engineering in the areas of design of high-performance RF/Analog Receiver/TIA design and 10 - 15 years experienceOr MSc EE Or PhD EE with 5+ years of experience in the areas of design of high-performance RF/Analog Receiver/TIA design.

  • Proven experience in IC design including chip tape-out AND lab evaluation of receiver design working in the industry).

  • Solid experience in.

    • Using EDA CAD tools

    • Performing Analog Custom Layout

  • Experience in measuring IC performance and debug of design to correlate simulations to measurements

  • Deep understanding of fundamentals, including:

    • Detailed transistor level design

    • Device physics

    • Control/Feedback loop stability analysis

  • Direct project experience in at least one of the following areas is a plus:

    • AGC loop design

    • High precision analog circuits (Including linear regulators, current sensors, bandgaps and DAC/ADC)

    • Experience in CTLE design

  • Experience in Package-System integration issues desired

  • Project experience in using different technologies. (SiGe BiCMOS is a plus)

  • A team-player

  • Experience in the following is a strong plus:

    • Overseeing and mentoring junior circuit designers

    • Experience as chip lead with success in silicon

    • Experience in taking chips to mass production

    • Ability to translate chip level specifications into architecture

  • Strong communication, presentation and documentation skills.

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      Expected Base Pay Range (USD)

      167,500 - 247,860, $ per annum

      The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

      Additional Compensation and Benefit Elements

      At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.

      All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

      Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

      Interview Integrity

      As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.

      Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.

      This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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